CXL 1.1 vs. CXL 2.0: What's the Difference

By Elad Shliselberg, System Architect, and Ronen Hyatt, CEO, UniFabriX Ltd.

Intro to CXL

Compute Express Link (CXL) is a cache-coherent interconnect, designed to be an industry-open

standard interface, between platform functions, such as processors, accelerators, and memory.

CXL 1.1 is the first productized version of CXL. It brings forward a world of possibilities and

opportunities to improve upon the many strong features that exist in the PCIe arsenal. To name

a few, CXL 1.1 introduces the concept of memory expansion, coherent co-processing via accelerator

cache, and device-host memory sharing. The rich set of CXL semantics goes much beyond the familiar cxl.io (PCIe with enhancements), to offer also cxl.cache, and cxl.mem. These semantics are groups into Device Types: 1 (cxl.io/cxl.cache), 2 (cxl.io/cxl.cache/cxl.mem) and 3 (cxl.io/cxl.mem). Given the disruptive nature of CXL, its true value and potential ecosystem of applications are yet to be realized once it is deployed at scale. As the standard evolves, CXL 2.0 builds upon CXL 1.1 and uncovers new opportunities to further strengthen the robustness and scalability of the technology, while being fully backwards compatible with CXL 1.1.

In this white paper we will explore the fundamental capabilities of CXL and highlight the primary

differences between CXL 2.0 vs. CXL 1.1 and the enhancements made as the protocol natively evolves.